Pcb Impedance Calculator - Microstrip Trace Impedance
Use this pcb impedance calculator to size a microstrip trace for controlled impedance. Enter width, copper thickness, height, and dielectric to read Z0.
Pcb Impedance Calculator
Results
What Is the PCB Impedance Calculator?
A pcb impedance calculator finds the characteristic impedance of a controlled-impedance trace from the four geometry values that actually set the impedance: trace width, copper thickness, substrate height, and substrate dielectric. It reports Z0 in ohms and Ɛ_eff, the dielectric the propagating wave actually sees.
- • Size a controlled-impedance trace for USB, HDMI, or Ethernet: Hit the 90 Ω differential target for USB 2.0, 100 Ω differential for USB 3.x / HDMI / DisplayPort / SATA / PCI Express / Gigabit Ethernet, or 50 Ω single-ended for RF links.
- • Match antenna feed line impedance: Compute the trace impedance that feeds a PCB antenna or RF connector so return loss stays inside the design budget.
- • Estimate impedance drift from substrate choice: Compare FR-4 against a low-loss substrate such as Rogers 4350B or Isola by changing only the dielectric constant.
- • Pre-flight a stack-up before fab: Sanity-check a controlled-impedance stack-up by computing impedance at each candidate layer before sending gerbers to the board house.
Controlled impedance matters once a signal edge is fast enough that the trace looks like a transmission line - usually when the trace length exceeds one tenth of the wavelength, which lands at a few centimetres past a 1 ns edge rate. The impedance is set by geometry, not by component choice.
The default this tool mirrors is the surface microstrip: a single trace on the outside layer with the substrate between it and the ground plane. The math is the Hammerstad closed-form equation with the standard finite-thickness correction.
How the PCB Impedance Calculator Works
The calculator evaluates the Hammerstad closed-form approximation for a surface microstrip. Copper thickness T enters first through the standard effective-width correction ΔW, then Ɛ_eff is computed, and finally Z0 is taken from the wide-strip or narrow-strip branch based on the corrected width-to-height ratio.
- Trace width (W): Copper trace width in mm. Wider traces lower impedance.
- Copper thickness (T): Foil thickness in mm. T feeds the ΔW correction; thicker copper lowers Z0 by 1 to 3 Ω on a thin substrate.
- Substrate height (H): Dielectric thickness between trace and ground plane in mm. Taller substrates raise impedance.
- Substrate dielectric (Ɛ_r): Relative dielectric constant. FR-4 lands between 4.2 and 4.6.
The Hammerstad equations ignore frequency dispersion. Above a few gigahertz Ɛ_eff drifts higher, so for 10 GHz+ designs run a 2.5D field solver alongside this calculator.
50 Ω target on 0.2 mm FR-4
W = 0.3 mm, T = 0.035 mm, H = 0.2 mm, Ɛ_r = 4.6
ΔW = (0.035/π) · (1 + ln(2·0.2/0.035)) = 0.0383, W_eff = 0.3383, u = 1.691 ≥ 1, q = 1/sqrt(8.10) = 0.351, Ɛ_eff = 2.8 + 1.8·0.351 = 3.433, Z0 = 376.73 / (sqrt(3.433) · (1.691 + 1.393 + 0.667 · ln(3.135))) = 52.86 Ω
Z0 = 52.86 Ω, Ɛ_eff = 3.433, Δ from 50 Ω = +5.7%
A 0.3 mm, 1 oz trace on 0.2 mm FR-4 lands just above 50 Ω. Drop W to hit the USB 2.0 45 Ω target or pick a thinner substrate for 50 Ω RF.
According to Microwaves101 (Microstrip Encyclopedia), the Hammerstad closed-form expression is the standard engineering approximation for a surface microstrip and agrees with full-wave simulation to roughly 1 percent for practical w/h ratios
For the matching 50 Ω or 75 Ω world that the trace impedance lives in, the rf unit converter turns dBm, dBµV, V, and mW into each other at the same system impedance the trace was designed for.
Key PCB Impedance Concepts
Four ideas show up in every controlled-impedance design discussion; understanding them once makes the calculator outputs land in context.
Characteristic impedance Z0
The instantaneous impedance a wave sees as it travels down the trace. Matching Z0 at the source and load prevents reflections, which is the point of a controlled-impedance trace. Z0 depends on geometry and Ɛ_eff, not on trace length.
Effective dielectric constant Ɛ_eff
A weighted average of substrate Ɛ_r and air, between 1 and Ɛ_r. Part of the field travels in the dielectric and part in the air above the trace. Wide traces see Ɛ_eff close to Ɛ_r; narrow traces see it drop toward (Ɛ_r + 1) / 2.
Aspect ratio W/H
The width-to-substrate-height ratio that picks the Hammerstad branch. W/H ≥ 1 takes the wide-strip expression; W/H < 1 takes the narrow-strip expression with the q2 = 0.04 (1 - W/H)² correction in Ɛ_eff.
Controlled impedance stack-up
The copper layers, core, and prepreg thicknesses the board house fabricates. Stack-up choice sets H for every layer, which sets impedance for a given trace width. A 50 Ω FR-4 stack-up is what lets a 0.3 mm trace on 0.2 mm prepreg actually land near 50 Ω.
These four ideas are enough to read any controlled-impedance datasheet and to argue with your board house about stack-up choices.
Once you know the effective dielectric, the wave speed calculator turns that number into the signal propagation speed so you can decide whether the trace length is in the transmission-line regime.
How to Use the PCB Impedance Calculator
Six quick steps take you from a stack-up choice to a controlled-impedance trace width that hits 50 Ω, 75 Ω, 90 Ω, or 100 Ω on the substrate you have.
- 1 Pick the trace width W: Enter the planned width in mm. Start with the value your layout rule allows.
- 2 Enter the copper thickness T: Foil thickness in mm. 1 oz is 0.035 mm; traces get thicker after plating.
- 3 Enter the substrate height H: Dielectric thickness between trace and ground plane in mm.
- 4 Enter the substrate dielectric Ɛ_r: FR-4 is 4.2 to 4.6; Rogers 4350B sits at 3.48.
- 5 Read Z0 and Ɛ_eff: Z0 is what the wave sees; Ɛ_eff is the weighted dielectric. Aspect Ratio shows which branch ran.
- 6 Iterate on W: Change W until Z0 lands on the target (50 Ω single-ended for RF, 90 Ω for USB 2.0, 100 Ω for USB 3.x / HDMI / Ethernet, 75 Ω for video).
A USB 2.0 differential pair on a 4-layer FR-4 board with H = 0.2 mm and ε_r = 4.4 wants 45 Ω per leg. Set W = 0.42 mm and T = 0.035 mm; the calculator returns Z0 ≈ 44.9 Ω and Ɛ_eff ≈ 3.38, inside the 90 Ω ± 10% USB 2.0 spec after coupling.
Once the trace impedance is locked, the dbm to watts calculator converts the signal power in dBm into the milliwatts the 50 Ω trace actually delivers at the receiver.
Benefits of Using This PCB Impedance Calculator
Six practical benefits explain why this tool saves time over re-deriving the Hammerstad equations by hand or waiting for a 2.5D field solver.
- • Returns both outputs at once: Z0 and Ɛ_eff together, so a swing's source is obvious.
- • Handles wide and narrow strips: Switches between Hammerstad branches by W/H with the q2 correction.
- • Accepts the engineering unit range you use: Trace widths 0.01 mm to 100 mm and Ɛ_r 1 to 20 cover 50 Ω microstrips to wide power traces.
- • Surfaces the 50 Ω delta: Δ From 50 Ω tells you the percent gap to the most common target.
- • Mirrors Saturn PCB Toolkit: Same Hammerstad expressions as Saturn and fab-house online tools, so the result matches your board house quote.
- • Teaches the geometry trade-offs: Shows aspect ratio and effective dielectric next to impedance, so the next move is obvious.
The biggest benefit is that it lets you iterate the geometry before sending gerbers to fab. A 30-second calculation tells you whether the planned trace width lands near 50 Ω or whether you need to bump a layer in the stack-up first.
For the loss-budget side of the same design, the decibel calculator handles the dB and dBm math for return loss, insertion loss, and crosstalk once the trace impedance is locked.
Factors That Affect Your PCB Impedance Results
Five factors decide whether the calculator number matches a TDR measurement or a fab-house quote, and two limitations tell you when to reach for a 2.5D field solver.
Substrate dielectric constant Ɛ_r
FR-4 Ɛ_r drifts from 4.2 at 1 MHz to 4.0 at 10 GHz and across batches. Use the value your substrate vendor published for the frequency you care about.
Copper thickness and plating
Finished copper is thicker than the raw foil by 0.5 oz to 1 oz of plating. The ΔW correction handles it; thicker copper lowers Z0 by 1 to 3 Ω on a thin substrate.
Soldermask on top of the trace
A 25 µm soldermask layer with Ɛ_r ≈ 3.5 sits above the trace and shifts Ɛ_eff up by a few percent. The calculator ignores soldermask; subtract 1 to 3 Ω if the trace is fully covered.
Trace etch tolerance
Etching tolerance is ±10% of the trace width on 1 oz copper. A 0.2 mm trace may end up at 0.18 to 0.22 mm, swinging impedance by roughly ±5 Ω on FR-4.
Reference plane proximity
The calculator assumes one solid ground plane directly under the trace at distance H. Split planes or a closer trace layer raise Ɛ_eff and lower impedance beyond the closed-form equation.
- • The Hammerstad equations ignore frequency dispersion, so Ɛ_eff and Z0 rise slightly above 5 GHz. Use a field solver for 10 GHz+ microwave designs.
- • The calculator models only a surface microstrip. Edge-coupled, embedded microstrip, and stripline geometries need different equations.
Most disagreement between the calculator and a TDR measurement comes from copper plating and soldermask. Trust the fab-house coupon measurement over the closed-form number above 5% disagreement.
According to IPC-2141A, the governing standard for high-speed controlled-impedance PCB design, characteristic impedance is set by closed-form expressions that take the stack-up, dielectric constant, and copper thickness as inputs, with the standard's geometry tables what fab houses quote against
The 376.73 Ω free-space impedance used in the Hammerstad formulas is derived from the NIST CODATA vacuum permeability μ0 = 1.2566370614 × 10⁻⁶ H/m and vacuum permittivity ε0 = 8.8541878128 × 10⁻¹² F/m, so the constant does not drift between board revisions
Underneath the transmission-line model, the electrical resistance calculator covers the basic Ohm's-law arithmetic that ground-return paths and DC nets on the same board follow.
Frequently Asked Questions
Q: What is PCB impedance?
A: PCB impedance is the characteristic impedance a high-speed signal sees as it travels down a copper trace on a printed circuit board. For a surface microstrip it is set by the trace width, copper thickness, substrate height, and the substrate's relative dielectric constant, and matching that impedance at the source and load prevents reflections on fast edges.
Q: How do you calculate PCB trace impedance?
A: Calculate PCB trace impedance with the Hammerstad closed-form equations. First apply the finite-thickness correction ΔW to the trace width, then compute Ɛ_eff = (Ɛ_r + 1)/2 + (Ɛ_r - 1)/2 · q, then plug Ɛ_eff into the wide-strip or narrow-strip expression for Z0.
Q: What is the formula for microstrip impedance?
A: The microstrip impedance formula branches on the corrected width-to-height ratio. For u < 1 use Z0 = (376.73 / (2π sqrt(Ɛ_eff))) · ln(8 H / W_eff + W_eff / (4 H)). For u ≥ 1 use Z0 = 376.73 / (sqrt(Ɛ_eff) · (u + 1.393 + 0.667 · ln(u + 1.444))). 376.73 Ω is the free-space impedance.
Q: What is the effective dielectric constant of a microstrip?
A: The effective dielectric constant of a microstrip is a weighted average of the substrate dielectric and air, between 1 and Ɛ_r. Wide traces see Ɛ_eff close to Ɛ_r; narrow traces see it drop toward (Ɛ_r + 1) / 2 as more field travels in the air above the trace.
Q: What is a typical PCB trace impedance for USB, HDMI, or Ethernet?
A: USB 2.0 targets 90 Ω differential (about 45 Ω on each leg), while USB 3.x, HDMI, DisplayPort, SATA, PCI Express, and 10/100/1000BASE-T Ethernet all target 100 Ω differential (about 50 Ω on each leg). 50 Ω single-ended applies to RF test gear and many RF/microwave links, not Ethernet.
Q: How does FR-4 dielectric constant affect PCB impedance?
A: Higher FR-4 dielectric constant raises Ɛ_eff and lowers Z0. Moving from ε_r = 4.2 to ε_r = 4.6 on a 0.2 mm FR-4 stack-up drops Z0 by roughly 3 Ω for the same trace width, enough to push a borderline 50 Ω design outside the controlled-impedance tolerance.